Semiconductor IP Industry News
September, 2019
ChipEstimate.com Partner Headline
The explosion of intelligent IoT devices and connected vehicles, supported by a fast-growing communication and processing infrastructure, is creating an exponential demand for energy. If we want to properly use our limited resources, energy saving must be considered as our main innovation focus.
When it comes to IC design, we can ...
SUNNYVALE, Calif. - Sep. 25, 2019 - Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced the tapeout of its 112G XSR SerDes PHY on a leading-edge 7nm process node optimized for PPA to support data center, networking, HPC, AI ...
Industry Headline
MOUNTAIN VIEW, Calif., Sept. 26, 2019 --
Synopsys, Inc. (Nasdaq: SNPS) today announced a collaboration with TSMC to develop a broad portfolio of DesignWare® interface IP, logic libraries, embedded memories, and one-time programmable (OTP) non-volatile memory (NVM) IP on TSMC's 5-nanometer (nm) FinFET Plus (N5P) Process. The DesignWare IP solutions for ...
ChipEstimate.com Partner Headline
Highlights:
• Cadence tools certified for the latest version of N6 and N5/N5P DRM and SPICE models
• TSMC and Cadence collaborating with customers on N6 design starts; customers in full production development with multiple test chips completed
• Active N5P customer engagements underway
• Collaboration advancing the development of next-generation mobile applications
SAN JOSE, Calif., September 25, 2019—Cadence ...
San Jose, CA – September 17, 2019 – Mixel, a leading provider of mixed-signal intellectual property (IP) announced today that Mixel’s MIPI® IP has been successfully integrated into the Microsoft Azure Kinect developer kit, which is now in volume production.
Azure Kinect Developer Kit is an edge device with advanced ...
Grenoble, France, September 23, 2019
One year ago, Soitec and MBDA acquired the assets of Dolphin Integration. The new structure, legally named Dolphin Design, had preferred to first keep « Dolphin Integration » as tradename to show its customers and partners that the company remained committed to support its legacy core ...
ChipEstimate.com Partner Headline
Woodcliff Lake, NJ — September 20, 2019 — Semiconductor intellectual property (IP) provider CAST, Inc. today announced that its CAN 2.0 and CAN FD Bus Controller IP Core is certified as ISO 26262 ASIL-B ready. The company believes this is the first such CAN IP core to receive ISO 26262 ...
ChipEstimate.com Partner Headline
SAN JOSE, Calif., Sept. 19, 2019 -- eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, and Samtec, a leading global manufacturer of electronic interconnect solutions, will demonstrate eSilicon’s 7nm 58G DSP-based PAM4/NRZ SerDes capabilities for two challenging data center applications including ...
ChipEstimate.com Partner Headline
Mixel’s IP now in imaging chip for depth camera with world’s smallest Time-of-Flight pixel
SAN JOSE, Calif. — September 17, 2019 — Mixel®, a leading provider of mixed-signal intellectual property (IP) announced today that Mixel’s MIPI® IP has been successfully integrated into the Microsoft Azure Kinect developer kit, which is now in ...
ChipEstimate.com Partner Headline
Synopsys, Inc. (Nasdaq: SNPS) today introduced its new DesignWare® ARC® EV7x Embedded Vision Processor family with Deep Neural Network (DNN) accelerator for machine learning and artificial intelligence (AI) edge applications. The ARC EV7x Vision Processors integrate up to four enhanced vector processing units (VPUs) and a DNN accelerator with up ...
ChipEstimate.com Partner Headline
September 12, 2019, San Jose, Calif. - eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, will partner with Samtec, a leading global manufacturer of electronic interconnect solutions, to deliver a rare booth-to-booth long-reach SerDes demonstration at AI Hardware Summit 2019.
What & When
58G SerDes ...
ChipEstimate.com Partner Headline
DesignWare CXL IP Delivers Low Latency and High Bandwidth for Artificial Intelligence, Memory Expansion, and Cloud Computing Applications
MOUNTAIN VIEW, Calif., Sept. 11, 2019 -
Highlights:
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Complete DesignWare CXL IP solution is built on Synopsys' silicon-proven PCI Express 5.0 IP, lowering integration risk for device and host applications
- 512-bit CXL controller enables a highly ...
ChipEstimate.com Partner Headline
Will Highlight Broad Portfolio of VIP for Simulation, Emulation, Formal, FPGA Prototyping and Design IP
SAN JOSE, CALIF - September 10, 2019 -
WHO: SmartDV™ Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP) supporting simulation, emulation, field programmable gate array (FPGA) prototyping, formal models and post-silicon validation platforms, Design ...
ChipEstimate.com Partner Headline
Attendees Will Learn About Solutions to Address Design Challenges in Artificial Intelligence, Machine Learning, Embedded Vision, Automotive Safety, and IoT Applications
MOUNTAIN VIEW, Calif., Sept. 9, 2019 -
WHEN: Thursday, September 19 from 9:30 a.m. to 5:30 p.m.
WHERE: Santa Clara Marriott, 2700 Mission College Blvd, Santa Clara, CA 95054
REGISTER: www.synopsys.com/ARCsummit
Synopsys, Inc. (Nasdaq: ...
ChipEstimate.com Partner Headline
News Highlights
- Turnkey face and expression recognition solution offers low latency without the need for cloud connectivity
- Localized processing at the edge ensures user privacy
- Based on the i.MX RT crossover microcontroller (MCU) running FreeRTOS, it drastically reduces system costs and total cost of ownership
BERLIN, Sept. 06, 2019 - (IFA 2019) - NXP ...
One-day event offers opportunities to learn, network and broaden technical knowledge of MIPI specifications and their use cases
PISCATAWAY, N.J. - September 5, 2019 - The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced details of its upcoming MIPI Developers Conference (DevCon) to ...
ChipEstimate.com Partner Headline
College Station, TX - 04 SEPTEMBER 2019 - Vidatronic, Inc., a leading provider of analog intellectual property (IP) cores for integration into systems on a chip (SoCs), including integrated power management unit (PMU) and CMOS radio-frequency (RF) solutions, partners with IP-Semantics for representation across North America and India. IP-Semantics, based ...
ChipEstimate.com Partner Headline
NSITEXE Adopts Synopsys Design, Verification and IP Solutions to Accelerate the Development of New Processor Chip
MOUNTAIN VIEW, Calif., Sept. 3, 2019 - Synopsys, Inc. (Nasdaq: SNPS) today announced that NSITEXE, Inc. achieved success with its first silicon for Data Flow Processor (DFP)-based SoC test chip by using Synopsys design, verification ...
Brings over 20 years of semiconductor operations expertise
SUNNYVALE, Calif. - September 2, 2019 - Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced that Sean Fan has joined the company as chief operating officer (COO). Fan has a 20-year ...
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