Under the name "C3IP" (Cologne Chip IP Cores), Cologne Chip introduces several ASIC IP to the market. The vast experience in ASIC design has led to an in-depth know-how especially in the field of telecommunication interfaces. Successful launches of many ICs and millions of sold microchips underline the company's expertise in ASIC and FPGA design.
IP Cores of Cologne Chip are based on DIGICC Technology: Telecommunication ICs typically require analog cores making designs inflexible and expensive. DIGICC-based C3IP does offer fully digital macros for these analog functions. The greatest advantage of C3IP is the scalability over a wide range of chip process technologies without requiring design efforts for each new technology. Furthermore Cologne Chip DIGICC cores need less silicon space than the analog counterparts and can also be integrated in some FPGA technologies at small trade-offs.
Phase Locked Loop (PLL) frequency synthesizer core, fully digital circuitry usin ...
Phase Locked Loop (PLL) frequency multiplier core, fully digital circuitry using ...
Quad Voice CODEC compliant to ITU-T G.712 and G.711, fully digital circuitry us ...